EDN

New CMP process for sub-100nm copper and low-k wafers

ACM Research, a two-year-old Californian company, says it can see the end of the road for chemical mechanical polishing (CMP), and is looking to move in on the market with a non-contact process. It ...
AZOM

Enhancing Chemical Mechanical Planarization (CMP) Yield Through Multivariable Process Monitoring

Effective fabrication of complex, high performance semiconductor devices is highly dependent on the use of chemical mechanical planarization (CMP). This process is used to planarize the wafer surface ...
Semiconductor Engineering

Reducing Rework In CMP: An Enhanced Machine Learning-Based Hybrid Metrology Approach

The semiconductor industry is constantly marching toward thinner films and complex geometries with smaller dimensions, as well as newer materials. The number of chemical mechanical planarization (CMP) ...
Semiconductor Engineering

Creating An Accurate FEOL CMP Model

For decades, semiconductor manufacturers have used chemical-mechanical polishing (CMP) as the primary technique for the smoothing and leveling (planarization) of dielectrics and metal layers. CMP ...
AZOM

Using White Light Interferometry to Characterize CMP Processes

Electronic and computer processors with a higher speed need smaller features for integrated circuits (IC), which also need smoother and smaller substrate surfaces. Chemical mechanical polishing (CMP) ...
EDN

France’s CMP offers access to ST’s 65-nm process

LONDON — Circuits Multi Projets (CMP), a multiproject wafer run aggregator, has introduced access to a 65-nanometer CMOS process from STMicroelectronics NV. The ST 65-nm library includes process ...